1.
PACHECO BAUTISTA D, SÁNCHEZ MERAZ M, CASTILLO SORIA FR. Frame, bit and chip error rate evaluation for a DSSS communication system. Revista-IIT [Internet]. 2009 Oct. 5 [cited 2024 Jul. 17];9(003). Available from: https://revistas.unam.mx/index.php/ingenieria/article/view/13499